Geylang - Staff Physical Design Engineer (IC Backend/OSAT/Cadence) LT63

• Collaborate on chip architecture: Work closely with the front-end design team to develop comprehensive chip floorplans, clock architectures, and power plans.
• Lead physical design processes: Take charge of the entire physical design lifecycle, from Netlist to GDSII, ensuring high-quality outcomes at every stage.
• Ensure design integrity: Conduct formal verification, static timing analysis, and physical verification to maintain the highest standards of chip design.
• Optimize power consumption: Perform power analysis and implement design strategies for improved efficiency and reliability.
• Drive project completion: Oversee the tapeout process, bringing designs from concept to reality.

• Educational background: Bachelor's degree or higher in electronic engineering, microelectronics, or computer science.
• Proven experience: Professionals with at least 3 years of hands-on experience in digital backend design, preferably with tapeout experience in advanced technology.
• Technical proficiency: Individuals skilled in TCL, Perl, or Python script development, and familiar with EDA tool design will have an advantage.

HOW TO APPLY:

Interested applicants, kindly send your resume in MS WORD format to leo.tang(at)trustrecruit.com.sg

We regret only shortlisted candidates will be notified.

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